This invention relates to the insertion of resistors in integrated-circuit memory or logic, specifically as related to semiconductor contacts.
Resistors of high value (typically 1 k ohm) are often desired at many locations in a circuit. A typical application is the use of resistors in memory or logic to guard against single event upset phenomena in spacecraft and other applications. Typically such resistors are patterned from a high sheet resistance film. It would be advantageous to integrate a high value resistor into a semiconductor contact, thus avoiding the area penalty for using such resistors repetitively over the surface of the circuit.
Chen et al. (U.S. Pat. No. 5,665,629) explains the formation of a highly-resistive layer over contact openings using a CVD or physical deposition process, controlling the resistivity of the layer through control of the proportion of silicon in the deposition process, and subsequently performing a pattern mask and etch of the deposited material to remove selectively the deposited resistive layer.
Manning (U.S. Pat. Nos. 5,159,430 and 5,232,865) explains the formation of polysilicon-filled vias in contact with a silicon device and subsequently implanting oxygen or nitrogen to increase the resistance of the polysilicon plugs. A high-temperature anneal at about 950 C is carried out to stabilize the resistor value. Since load resistors are required only in some of the contacts, Manning""s process involves fabricating the resistor contacts in a separate step, (i.e., two mask steps are required in order to fabricate all the contacts). An annealing temperature of 950xc2x0 C. is high for very shallow doped devices, which can cause dopant spreading and affect junction widths. It is therefore preferable to form a high-value resistor using a lower-temperature process.
These prior-art methods teach the formation of a resistor by either introducing silicon in an SiO2 layer or introducing oxygen or nitrogen into an Si layer, (i.e., by forming off-stoichiometric structures).
It is an object of the invention herein to simplify the prior art by selectively converting silicon substrate material located in a contact to a material with a desired higher resistivity, thereby eliminating the need to incorporate an added resistive layer.
It is an object of the invention herein to integrate a resistor with a metal interconnect.
It is another object of the invention herein to produce a high resistance contact having highly linear I-V characteristics over a wide range of voltage.